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 engineering - Santa Clara, California, United States

   
Job information
Posted by: Confidential 
Hiring entity type: Other 
Work authorization: Existing work authorization required for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Engineering - Other
 
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
 
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: SsY4ygyQrZn0KYNrsPXvgQ9BMxpF4P / Latpro-3532704 
Date posted: Mar-05-2017
State, Zip: California, 95054

Description

ENGINEERING Intel Corporation, Intel Mobile Communications North America Inc., Intel Federal, LLC and Intel Americas, Inc. have opening(s) in San Jose and Santa Clara, CA. Positions are in Santa Clara unless otherwise stated. Combination ed/exp accepted in some positions in lieu of degree. To apply, email resume to SantaClara_jobs@intel.com and reference the job # below. Apply to each job # of interest. Applications will be accepted through 04/14/17. EOE Intel Corporation positions: Analog EngDesigns, develops, modifies and evaluates complex analog and mixed signal electronic parts, components or integrated circuitry for analog and mixed signal electronic equipment and other hardware systems. Requires BS+5 yrs exp OR MS+3 yrs exp (#1328); MS (#1329 positions in both San Jose and Santa Clara); MS+1 yr exp (#1330); MS+3 yrs exp (#1331); PhD (#1332). App EngEnsure software products by leading software vendors (ISVs and corp. developers) run best on the company's latest and upcoming platforms and technologies. Requires BS+5 yrs exp OR MS+3 yrs exp (#1465); MS (#1333 positions in both San Jose and Santa Clara); MS+3 yrs exp (#1466). Automation EngIntegrates, tests, installs, configures, and/or supports Factory automation software systems. Requires BS+5 yrs exp OR MS+3 yrs exp (#1334); MS+3 yrs exp (#1335). CAD EngDevelop and apply computer aided design (CAD) methods, theories and research techniques in the investigation and solution of technical problems. Requires MS (#1448 positions in both San Jose and Santa Clara); PhD (#1336). Component Design EngDesign and develop electronic components. Requires BS (#1337 positions in both San Jose and Santa Clara); BS+5 yrs exp OR MS+1 yr exp (#1338 positions in both San Jose and Santa Clara); BS+5 yrs exp OR MS+3 yrs exp (#1339 positions in both San Jose and Santa Clara); MS (#1340 positions in both San Jose and Santa Clara); MS (#1494 travel to Folsom company site 20% of the time, this req ONLY will accpt apps thr 4/16/17); MS+1 yr exp (#1341 positions in both San Jose and Santa Clara); MS+3 yrs exp (#1342 positions in both San Jose and Santa Clara); PhD (#1343 positions in both San Jose and Santa Clara). Data ScientistUses predictive modeling, statistics, Machine Learning, Data Mining, and other data analysis techniques to collect, explore, and extract insights from structure and unstructured data. Requires BS+5 yrs exp OR MS+3 yrs exp (#1476); MS (#1450); MS+1 yr exp (#1451); MS+3 yrs exp (#1477). Engineering Mgr (SW)Plan, provide resources for and direct software engineering activities to meet schedules, standards, and budget. Requires BS+5 yrs exp OR MS+3 yrs exp (#1344 positions in both San Jose and Santa Clara); MS+3 yrs exp (#1345 positions in both San Jose and Santa Clara). Financial AnalystAnalyzes financial information and develops solutions to complex problems. Requires BS+5 yrs exp OR MS+1 yr exp (#1346); MBA or related (#1347); MBA or related+1 yr exp (#1348). Firmware EngConduct or participate in multidisciplinary research and collaborate with design, layout and/or hardware engineers in the design, development, and utilization of productivity enhancement layout tools and design rule checkers, electronic data processing systems software. Requires BS+5 yrs exp OR MS+3 yrs exp (#1349). Graphics Hardware EngEnsure that computer platform and its components have optimal performance and power balance, specifically focusing on graphics hardware components. Requires MS (#1350); MS (#1351 travel to Folsom company site 20% of the time); MS+1 yr exp (#1352). Graphics Software EngResponsible for developing multiple aspects of graphics software, display driver development and simulation environment development. Requires MS (#1353); MS+1 yr exp (#1354). Hardware EngConducts or participates in multidisciplinary research in the design, development, testing and utilization of information processing hardware and/or electrical components, mechanisms, materials, and/or circuitry, processes, packaging, and cabinetry for central processing units (CPUs) and/or peripheral equipment. Requires BS+2 yrs exp (#1355); BS+3 yrs exp (#1356); BS+5 yrs exp OR MS+3 yrs exp (#1496 this req ONLY will accpt apps thr 4/23/17); MS (#1357 positions in both San Jose and Santa Clara); MS+1 yr exp (#1358). Info Security SpecResponsible for the development and/or enforcement of corporate and business group information security policies to protect Intel's information assets and intellectual property. Requires MS (#1359 positions in both San Jose and Santa Clara); MS+1 yr exp (#1360 positions in both San Jose and Santa Clara). Packaging Eng (Mechanical)Emphasis in working with the design standards, documentation, specifications, and life cycle of electromechanical designs in semiconductor fabrication. Design and develop product packaging and provide ongoing engineering support for integrated circuit or semiconductor assemblies. Requires BS+5 yrs exp OR MS+3 yrs exp (#1361); MS+3 yrs exp (#1362). Physical Design EngCreate bottom-up elements of chip design, including FET, cell, and block-level custom layouts, FUB-level floor plans, abstract view generation, RC extraction, and schematic-to-layout verification and debug. Requires BS+3 yrs exp (#1363); BS+5 yrs exp OR MS+3 yrs exp (#1459 positions in both San Jose and Santa Clara); MS (#1364 positions in both San Jose and Santa Clara); MS+1 yr exp (#1365 positions in both San Jose and Santa Clara); MS+3 yrs exp (#1467 positions in both San Jose and Santa Clara). Process EngDesign and plan the layout for such processes as hardening, washing, laminating, etching, engraving, polishing, painting, plating, and other material processing operations. Conducts tests and measurements throughout stages of production to determine control over such variables as temperature, density, specific gravity, pressure, and viscosity. Requires MS (#1366); PhD (#1367).

Requirements

None

 

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