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 SoC Performance Modeling Software Architect - San Diego, California, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Programming Languages
Computers - Platforms
Computers - Software Engineer
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200143337 / Latpro-3737661 
Date posted: Apr-22-2020
State, Zip: California, 92101


SoC Performance Modeling Software Architect

San Diego , California , United States



Posted: Apr 14, 2020

Role Number: 200143337

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, and inspiring people working on innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product. Are you ready to join our team and revolutionize System-on-Chip development? In this role, you will be a member of a System-on-Chip team, working with our various hardware and software engineering groups to shape the architecture of Apple's future devices.

Key Qualifications

  • Your experience and interest will be in several of the following areas:
  • You have 8+ years of SOC design and architecture experience.
  • You have C/C++ performance modeling/simulation of a CPU, GPU, or other SoC component.
  • Best practices for ensuring high code quality, performance, reuse, and modularity in large software projects.
  • You are proficient in C++, the Unix shell, and at least one scripting language.
  • System software concepts including inter-process communication, synchronization, interrupts, cache coherence, memory ordering, and memory-mapped I/O.
  • You are interested in exploring, understanding, and extending large C/C++/Assembly codebases.
  • Correlation of simulation results with other simulations, expectations, and silicon measurements.
  • Interactions and data flows between CPUs, GPUs, Camera/Video, and I/O components.
  • You have familiarity with processor or SoC design and validation processes.


You will be a primary architect of a C++ full-chip performance modeling platform. This platform enables accurate performance and power projection for complex, realistic workloads. Your work will be highly visible and critical to improving the performance and energy efficiency of our future Apple SoCs. We collaborate with teams at many layers of the hardware/software stack and you will also: - Bring your deep understanding of the architecture, operation, and hardware/software interface of current and planned Apple SoCs. - Disseminate cross-functional, system-level understanding across the silicon design organization. - Design and develop foundational libraries and APIs to enable seamless interoperability between performance models of different SoC blocks and different levels of detail. - Design and carry out performance studies using the simulation platform, and communicate the results to inform SoC architecture decisions. - Make the simulator an early prototyping platform for software and firmware algorithms related to power and performance control and resource allocation. - Use and disseminate software engineering best practices, such as continuous integration and code review, to ensure high quality and maintainability in a project developed across multiple teams and sites. - Design and develop simulator features and analysis tools to enable accurate, automated correlation between the simulator and RTL or silicon, and performance regression testing of the simulator itself and the simulated SoC.

Education & Experience

- Masters or PhD in Electrical Engineering or Computer Science or related field preferred.


See job description


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