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 Digital Design/Integration Engineer - Cupertino, California, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Creative services/Design
Engineering - Electrical
Engineering - Telecom
Computers - Software Engineer
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200094543 / Latpro-3737898 
Date posted: Apr-22-2020
State, Zip: California, 95014


Digital Design/Integration Engineer

Santa Clara Valley (Cupertino) , California , United States



Posted: Feb 7, 2020

Role Number: 200094543

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and expertly handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices. As a member of SoC design team, you will be at the center of a SoC design and integration and will design power management IP with a critical impact on getting functional products to millions of customers.

Key Qualifications

  • The candidate will have a Bachelors degree in EE with 4+ years of work experience or Masters degree with 2+ years work experience.
  • 4+ years of RTL Logic Design experience of multi-million gate ASICs
  • Hands on experience for all aspects of the chip development process with proficiency in front end tools and methodologies related to synthesis, formal verification, CDC analysis and power checks
  • Experience writing micro-architecture specifications and converting them to design
  • Experience crafting low power ASICs/SOCs from scratch


As a Digital Design/Integration Engineer, you will have responsibilities to design IPs related to power manager. - Working with other specialists that are members of the SoC Design, SoC Design Verification, System Verification, Firmware. -Emulation, STA, and Physical Design teams to implement power/clock manager which meets all requirements of the each block. - Integrating various IPs and ensuring design meets DFT (design-for-test), CDC (clock domain crossing), Synthesis/Static Timing and Power Requirements. - Working with CAD and Flow teams to define and improve front-end design methodologies. - Developing micro-architecture and design specifications. - Implementing and verifying complex logic designs. - Working with designers on STA, physical, power and logical issues.

Education & Experience

- BSEE / MSEE is required


See job description


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