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 Processor Power Management Verification Engineer - Cupertino, California, United States

   
Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Electronics
 
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
 
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200146540 / Latpro-3738474 
Date posted: Apr-22-2020
State, Zip: California, 95014

Description

Processor Power Management Verification Engineer

Santa Clara Valley (Cupertino) , California , United States

Hardware

Summary

Posted: Mar 13, 2020

Role Number: 200146540

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! Are you ready to join Apple and revolutionize CPU development? We are looking for a strong candidate to join our processor verification team focusing on the Power Management and Clock Control verification. In this highly role, you will be at the center of a chip design effort collaborating with many disciplines, with a critical impact on getting functional products to millions of customers quickly.

Key Qualifications

  • The ideal candidate should have 2+ years of processor verification experience.
  • In-depth knowledge of digital logic, micro-processor and power management architecture and microarchitecture.
  • Expertise in developing testplans, testbenches, C/C++-based transactors, and writing/debugging assembly based tests.
  • Experience in silicon bringup is desired.
  • Experience with advanced verification techniques such as formal and assertions is a plus.
  • Should be an extraordinary teammate with excellent communication skill, be able to work independently on the verification efforts for a block/area of the design.

Description

As a processor Power Management verification engineer, you will have the responsibilities as follows:

  • Work closely with architecture and RTL designers on verifying the functionality correctness of the Power Management and Clock Control logic
  • Develop test plans and unit test environments
  • Develop tests in assembly, C, or vectors according to test plans to drive testing in simulation and emulation environments
  • Root cause failing tests
  • Work with silicon bringup team on developing tests that work in the emulation and FPGA environments
  • Develop coverage monitors and analyze coverage to ensure all the test cases in the test plans are covered
  • Develop checkers or C/C++-base transactor to verify the design
  • Write assertions and apply formal verification to the design

    Education & Experience

    BS, MS, or Ph.D. in Computer Engineering, Electrical Engineering, or Computer Science is required.



  • Requirements

    See job description

     

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