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 Silicon System Design Engineer - Cupertino, California, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Creative services/Design
Engineering - Electrical
Engineering - Telecom
Computers - Software Engineer
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200164051 / Latpro-3738495 
Date posted: Apr-22-2020
State, Zip: California, 95014


Silicon System Design Engineer

Santa Clara Valley (Cupertino) , California , United States



Posted: Apr 21, 2020

Weekly Hours: 40

Role Number: 200164051

Apple Silicon Engineering is seeking inspired engineers to design the next generation of world-class Systems-On-Chips (SOCs). Our SOCs are the brains behind every iPhone, iPad and Apple Watch. These SOCs pack billions of transistors and functions to reach millions of lives and to change them for the better. Our analog & mixed-signal (AMS) IPs play a key part in linking these SOCs to the physical world. Our goal in AMS group is to deliver top quality IPs to our products with innovation and efficiency. We focus on the finest details in setting the stage for the best experience. These AMS IPs include SERDES for data communication, PLLs for clock generation, and sensors for measuring physical entities. As the demand for our SOCs grow, we continue to build our IP portfolio. As a key member of our team, you will interact with many teams to enhance the quality of our IPs. You will get to lead the efforts to bridge design and validation in many platforms too. If you have the related experience, have a growth mentality, and enjoy collaboration, we'd love to hear from you! We are looking forward to having you be part of the outstanding culture we have in our group while helping us excel at what we do.

Key Qualifications

  • Proven track record of IP and system level silicon validation and debug efforts in several platforms (e.g., ATE, LAB etc.).
  • Experience in bring-up, board specs (e.g., power and signal integrity) and LAB equipment use for AMS IPs.
  • Deep knowledge in AMS debug methods, DFT concepts (e.g., JTAG, scan and test coverage), IP flows and automation.
  • Experience in AMS design and circuits (e.g., LDOs, PLLs, DLLs, CDR, SERDES, DDR, sensors etc.).
  • In-depth knowledge of RTL design, simulation and waveform debug tools (e.g., Verdi).
  • Efficient in data analysis, coding and scripting (e.g., Python, C/C++, TCL, Perl etc.).
  • Skilled at problem-solving and managing tasks and time.
  • Enjoy inspiring and engaging with people from various teams to reach a common goal.
  • Experience with emulation is an asset.
  • Knowledge of SOC architectures and PHY protocols (e.g., PCIE, USB, SATA, CIO, DDR) is an asset.


As a Silicon System Design Engineer, you will: Develop strategies to support pre- and post-silicon design, automation, bring-up and debug. Work with the design team to improve IP architecture and design based on post-silicon learning. Engage with various teams (e.g., RTL, DFT, ATE, LAB) in developing test patterns before silicon arrival. Study pre- and post-silicon data to support LAB and ATE teams. As well as, drive initiatives to improve test coverage at SOC and IP level. Work with several teams (e.g. DFT, emulation, firmware) in pre- and post-silicon validation. Lead silicon debug efforts on different stages of design per IP needs.

Education & Experience

B.S. with 8+ years of related expertise


See job description


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