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 SOC Integration Engineer - Austin, Texas, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Components
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200000968 / Latpro-3738652 
Date posted: Apr-22-2020
State, Zip: Texas, 78729


SOC Integration Engineer

Austin , Texas , United States



Posted: Jul 30, 2019

Role Number: 200000968

Imagine what you could do here. At Apple, great ideas have a way of becoming great products and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our commitment to leave the world better than we found it. The industry is accustomed to Apple taping out the SOC's for our various products at a rigorous pace. In order to achieve this, Apple's world-class design and integration processes are driven by our top notch integration engineers. We own various blocks of the chip and coordinate with various teams to get all changes released to the database and production synthesized on the project scheduled delivery dates. You will be at the center of it all, working on some our most mission-critical items and which will allow you to develop close working relationships with many groups across all levels, you will also build an organized approach to coordinate all tasks in parallel to hit schedules consistently with a quality design. Are you ready to join our team and help us deliver the next groundbreaking Apple products?

Key Qualifications

  • Did we pique your curiosity yet? Are you wondering what it takes?
  • This position requires in-depth knowledge of the ASIC/SOC design and integration processes. You'll have 5+ years of experience working on FE design that include RTL design, synthesis and QC flows for large scale SOCs. We pride ourselves on the high quality of our work and your consistent track record of working on high performance designs in high volume production environments for low power applications will be the key to impress us. We'll be looking for your expertise in SOC IP integration, sub-system creation and RTL Design for SOC top-level such as IO/PAD-ring, clock and reset distribution and power-management. You're experienced in FE production synthesis with DFT insertion and with expertise in RTL/netlist quality checks including lint, CDC, RDC and logical equivalence. You should have extensive experience developing power intent (UPF) for the complex, high-performance and low-power SOC with large number of power islands as well as voltage islands. In addition, your familiarity with DFT (scan, BIST, JATG), timing-closure (STA) and backend related methodologies and tools will be a welcomed asset for us.
  • We function as the liaison between so many diverse groups within and outside of our company, your ability to drive the communication and collaborate across teams is a crucial attribute. Our most successful team-members are usually the self-starter type, highly motivated and highly organized and we live by the schedule.


This role will give you ownership of all aspects of design and development of large SOCs, SOC blocks and sub-systems. You will handle internal/external IP integration and create complex sub-systems. You'll design the SOC top level with IPs, sub-systems, PHY-macros, IO/PAD-ring system bus and other infrastructure components for clocking, reset and power-management. You'll build the integration specs for the blocks and sub-systems you develop, run QC checks to ensure quality, create UPF, run synthesis and generate netlist, and close timing for the blocks. Work closely with Chip Architecture, Design Verification, Physical Design, DFT and power teams to achieve SOC tape-out goals on schedule. Develop and maintain methodology/flows/checks for your design. Work with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating proper checks at every stage of the design process.

Education & Experience

You should have a BS/MS/PhD in Computer Engineering or Electrical Engineering or equivalent experience. Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.


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