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 Silicon Validation Software Engineer: DDR Memory Controller Validation - Cupertino, California, United States

   
Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Programming Languages
Computers - Platforms
Computers - Software Engineer
 
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
 
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200059342 / Latpro-3738674 
Date posted: Apr-22-2020
State, Zip: California, 95014

Description

Silicon Validation Software Engineer: DDR Memory Controller Validation

Santa Clara Valley (Cupertino) , California , United States

Hardware

Summary

Posted: May 10, 2019

Role Number: 200059342

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product. Are you passionate about changing the world? We have a critical impact on getting high quality functional products to millions of customers quickly and we are hiring all levels from junior to senior roles. As part of a highly skilled SoC bringup/validation team you will design, implement, test and support low-level software used for system initialization and testing of Apple SoCs.

Key Qualifications

  • Deep understanding of DDR technologies such as DDR3/4, lpDDR3/4, JEDEC standards
  • Experience in implementing DRAM/memory controller initialization code, memory subsystem/DDR PHYs training/calibration software
  • Excellent C/C++ programmer, assembly language is a plus
  • Deep understanding of ARM, CPU/SoC architecture
  • Experience and interest in writing code to test IO devices and/or functional IP units
  • Familiar with: boot code, computer system initialization, device drivers, SoC bringup, IO devices, debuggers, analysis tools (logic analyzers, oscilloscopes)
  • Excellent communication skills and teamwork abilities.
  • Familiar with high speed LPDDR IO characterization and PVT qualifications is a plus
  • Previous experience working with major DRAM memory vendors and validation of DRAM device is a plus

Description

- Responsibilities include developing/porting/debugging memory controller/DRAM initialization code, and memory calibration software - You will be developing and executing test plans for pre- silicon and post-silicon verification, designing and crafting targeted tests for validating specific memory controller functionality/ECOs - You will be involved in silicon early bring-up, investigating system DRAM issues, and discovering workarounds - You will be developing software tools to support silicon bring-up of the memory subsystem, and implementing special memory tests. - You will work with cross functional teams to support product development

Education & Experience

BS / MS / Ph.D in EE or CS is required



Requirements

See job description

 

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