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 Pixel IP Design Engineer- Integration & Implementation - Cupertino, California, United States

   
Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Creative services/Design
Engineering - Electrical
Engineering - Telecom
Computers - Software Engineer
 
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
 
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200157500 / Latpro-3738956 
Date posted: Apr-22-2020
State, Zip: California, 95014

Description

Pixel IP Design Engineer- Integration & Implementation

Santa Clara Valley (Cupertino) , California , United States

Hardware

Summary

Posted: May 7, 2020

Role Number: 200157500

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, we will enable our customers to do all the things they love with their devices. In this highly visible role, you will be at the center of a multimedia IP design effort working with all disciplines, with a critical impact on getting functional products to millions of customers quickly.

Key Qualifications

  • Experience in IP/SoC design, integration, and implementation.
  • Industry exposure to and knowledge of ASIC/FPGA design methodology, especially logic synthesis, static timing analysis, logic equivalence checking, and working with physical design teams for floorplanning and timing closure
  • Experience with system design methodologies that contain multiple clock domains
  • Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB)
  • Experience in low-power design issues, tools, and methodologies including UPF power intent specification highly desired
  • Experience in datapath and pixel-centric designs a plus
  • Excellent collaboration skills
  • Outstanding written and verbal communication

Description

As an IP Design engineer you will have responsibilities spanning all aspects of multimedia IP design: - Will be responsible for imaging design, integration, and implementation for subsystems containing both internal and external IPs - Responsibility includes feasibility, micro-architecture, RTL design, front-end implementation and post-silicon system bring-up

Education & Experience

BSEE / MSEE is required



Requirements

See job description

 

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