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 Design Verification Engineer: Analog & Mixed Signal - Cupertino, California, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Creative services/Design
Engineering - Electrical
Engineering - Telecom
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200001355 / Latpro-3739754 
Date posted: Apr-22-2020
State, Zip: California, 95014


Design Verification Engineer: Analog & Mixed Signal

Santa Clara Valley (Cupertino) , California , United States



Posted: Jan 22, 2019

Role Number: 200001355

Did you know that Apple is hiring analog verification engineers? We are looking for engineers that are enthusiastic to find bugs! You can work with a creative team to craft test plans and enable production-quality first silicon. The IP to be verified includes bucks, boosts, buck-boosts, charge pumps, chargers, or LDOs at both the top chip and IP levels. In addition, you will verify IP related to power management, such as mixed signal circuits, switch-cap, filters, data converters, references, input-output circuits, and clock circuits just to name a few. Daily work involves verification of mixed signal IC designs using a combination of analog circuits and Verilog RTL in the same simulation. The role will enable bug-free initial silicon in preparation for production. Responsibilities include all phases of pre-silicon verification from early discussions with architects, reviewing specifications, writing verification plans, running simulations, triaging issues, and reviewing results with the team.

Key Qualifications

  • Do the following qualifications match your background? We usually look for at least 3 years of experience in industry for production integrated circuits.
  • Possess the ability to verify analog/mixed-signal designs in a collaborative work environment
  • Experience with developments in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code.
  • Having the capability to write analog assertion checks to catch bugs
  • Possess sufficient analog IC background to identify failure possibilities, work through first order debug, and analyze analog verification results
  • Ability to write test plans, present results, and communicate clearly with cross functional teams.
  • Submit simulation jobs through network computing clusters and manage both simulation clock and wall clock required to finish the verification plan.
  • We look for someone that understands both power management and related auxiliary circuitry: switching converters, linear converters, reference circuitry, band-gaps, data converters, and/or clock generators.
  • Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, coverage collection, gate level simulations Experience developing scalable and portable test benches
  • A background that includes scripting or programming languages is preferred. These include, but are not limited to, TCL, Skill, Python, and/or PERL.
  • Your familiarity with analog behavioral models is also a plus.


In this role, you will be responsible for ensuring high quality silicon for IC chips and IPs. The workflow starts with careful review of specifications followed by crafting of a verification plan and schedule. Then the verification is executed according to plan to support tapeout.

  • Execution of verification plans from beginning to end: test bench and environment bring-up, regressions, failure debug, and tape-out
  • Develop detailed test and coverage plans based on IC specifications
  • Develop verification methodology suitable for the IP, ensuring scalability and portability
  • Develop verification environment, including stimuli, checkers, assertions, trackers, and coverage
  • Sign-off mixed signal designs in preparation for tapeout.

    Education & Experience

  • A master of science degree in electrical or computer engineering is preferred.

  • Requirements

    See job description


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