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 IC Packaging Engineering Lead/Manager - Cupertino, California, United States

   
Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Software Engineer
 
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
 
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200176166 / Latpro-3744395 
Date posted: Jun-18-2020
State, Zip: California, 95014

Description

IC Packaging Engineering Lead/Manager

Santa Clara Valley (Cupertino) , California , United States

Hardware

Summary

Posted: Jun 17, 2020

Role Number: 200176166

Do you like to work on ground breaking technologies that enable amazing new products? Do you have the attention for details and love for excellence to work towards an extraordinary result? Envision what you could do here! At Apple, we believe new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! We are looking for a hardworking, talented and passionate IC Packaging Engineering Lead to join our team.

Key Qualifications

  • 5+ years of experience in Semiconductor Packaging Design, Process & Technology Development
  • Good understanding of cross-functional packaging areas: Si floor plan, package layout and architecture, enabling process technologies, thermal, mechanical, SI/PI, material, component & system level reliability, testing, and FA
  • Expert in advanced packaging technologies: Knowledge and insight to deliver high density / high performance interconnects in various form factor, thermo-mechanical, reliability, and cost constraints
  • Excellent problem solving with strong physics and fundamentals
  • Excellent communication skills that enable the candidate to work well with internal cross functional teams and overseas suppliers
  • Cross-functional coverage on package layout (Cadence APD/Allegro), critical signal integrity / power integrity, thermal, design rules, BOM, design for manufacturing, reliability, and cost
  • Ability to work independently and take on projects with minimum supervision

Description

Work with cross-functional teams and lead package integration and architecture efforts Work with 3rd party and OSAT to bring packaging solution from concept to HVM Drive industry with advanced package solutions and specs ~10% International travel

Education & Experience

Ph.D. or M.S. in Electrical Engineering, Mechanical Engineering, Materials Science or Physics required and relevant experience within technical discipline.



Requirements

See job description

 

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