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 Digital Design Engineer - Cellular - San Diego, California, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Engineering - Telecom
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200200679 / Latpro-3758785 
Date posted: Oct-21-2020
State, Zip: California, 92101


Digital Design Engineer - Cellular

San Diego , California , United States



Posted: Oct 20, 2020

Role Number: 200200679

Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of what's considered feasible? As part of our team, you'll craft sophisticated digital baseband logic design in state-of-art cellular ICs that deliver more performance in our products than ever before! You'll work across different fields to transform improved hardware elements into a single, integrated design. Join us, and you'll help us innovate new wireless systems technologies that continually outperform the previous iterations! By collaborating with our other product development groups across Apple, you'll push the industry boundaries of what wireless systems can do and improve the product experience for our customers across the world. As a Digital IC Design Engineer on this team, you will be at the center of the digital logic design effort within a silicon design group responsible for designing and productizing state-of-the-art wireless SoCs. This position requires someone comfortable with all aspects of hardware and embedded software development, who thrives in a dynamic multi-functional organization, who is not afraid to debate ideas openly, and is flexible enough to pivot on constantly evolving requirements.

Key Qualifications

  • 5+ years of ASIC/VLSI design experience and a track record of developing complex ASIC functions in successful products.
  • Excellent logic design experience including high speed deep sub-micron design and power management/techniques for low power design.
  • Experience with DSP hardware implementations including data path and control logic.
  • Experience with cellular physical layer protocols. 3GPP is a plus.
  • Familiarity with design tools for simulation, debugging, synthesis and timing analysis.
  • Knowledge of C/C++/SystemC and DSP algorithm modeling is a plus.
  • Experience with backend interface, DFT, and silicon debug are pluses.


You will specify, design, and implement DSP hardware including data path and control logic. You'll directly assist in the development of logic design including high speed deep sub-micron design and power management/techniques for low power design. Take part in defining and standardizing methodologies.

Education & Experience

BSEE is required. MSEE or PhD is preferred.


See job description


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