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 Design Verification Engineer - Cupertino, California, United States

   
Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Software Engineer
 
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
 
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200204717 / Latpro-3760645 
Date posted: Nov-04-2020
State, Zip: California, 95014

Description

Design Verification Engineer

Santa Clara Valley (Cupertino) , California , United States

Hardware

Summary

Posted: Nov 3, 2020

Role Number: 200204717

Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology and we'd love to have you join us.

Key Qualifications

  • Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy
  • Knowledge of Verilog/System Verilog, digital simulation and debug
  • Knowledge of computer architecture and digital design fundamentals
  • Ability to work independently to deliver the project goals
  • Exposure to UVM is desired
  • Experience with C/C++, assembly is a plus
  • Experience with perl, python or similar scripting language
  • Excellent interpersonal skills and the dream to take on diverse challenges

Description

As part of a very talented team you will be at the heart of the chip design effort collaborating with all disciplines (vertical product model). You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the functional & performance goals of the design and you use this knowledge to test effectively. You develop test plans, tests & coverage plans as well as define our next generation verification methodology & test benches. It's required that you communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. We also require additional responsibilities such as running and triaging regressions, tracking bugs, and analyzing coverage to achieve top results.

Education & Experience

BSEE or BSCS required; Master's or PhD desired.



Requirements

See job description

 

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