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 Cellular Layer1 Common Firmware Engineer - Cupertino, California, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Engineering - Telecom
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200206150 / Latpro-3761583 
Date posted: Nov-11-2020
State, Zip: California, 95014


Cellular Layer1 Common Firmware Engineer

Santa Clara Valley (Cupertino) , California , United States



Posted: Nov 10, 2020

Role Number: 200206150

Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of what's considered feasible? As part of a world class modem team, you'll craft sophisticated leading-edge embedded firmware that deliver more performance in our products than ever before. You'll work across disciplines to transform improved hardware elements into a single, integrated design. Join us, and you'll help us innovate new cellular technologies that continually outperform the previous iterations. By collaborating with other product development groups across Apple, you'll push the industry boundaries of what wireless systems can do and improve the product experience for our customers across the world. Do you want to have an impact on every single Apple product? As a Cellular Layer 1 Common Firmware Engineer on this team, you will be at the center of the 5G/4G/multimode cellular firmware effort within a silicon design and firmware development group responsible for designing and productizing state-of-the-art cellular SoCs. This position requires someone comfortable will all aspects of embedded software development, that thrives in a dynamic cross-functional organization, is not afraid to debate ideas openly, and is flexible enough to pivot on constantly evolving requirements.

Key Qualifications

  • Deep understanding of software engineering principles, and core computer science fundamentals.
  • Highly competent with C and C++ and assembly programming, solid understanding of compilers, build and source code control tools.
  • Significant experience with embedded real-time programming for low latency and memory constrained applications
  • Significant experience and solid understanding and programming of cache-friendly, data-oriented objects and handles.
  • Significant experience with Real Time Operating Systems (RTOS) applications, multi-core, multi-threaded and concurrent programming.
  • Experience with ISS, virtual platforms, silicon prototyping and emulation systems.
  • Experience in core BSP implementation.
  • Experience in scripting languages like Perl and Python.
  • Proficiency in debugging embedded software systems.
  • Familiarity with ETM, ETB, JTAG, HW breakpoints, Lauterbach, TRACE32 and any other trace and debug SW/tools.
  • Understanding of 5G and 4G 3GPP standards, or similar Wireless standards(2G,3G, WiFi) and competent knowledge on Physical Layer control is a plus.


  • Specify, design, and implement a multi-mode L1 firmware architecture of a state-of-the-art mobile wireless communications system.
  • Implement and/or customize CPU core infrastructure and drivers. Example areas include: o Symmetric Multi Processing (SMP) RTOS configuration. o Asymmetric Multi Processing (AMP) RTOS configuration. o Interrupt controller configurations. o MMU/MPU configuration. o Boot-Loader configurations. o Cache Management. o RTOS thread management. o DMA and timer Drivers. o Power and clock drivers.
  • Model HW blocks in Virtual Platforms (VP). o Integrate CPU ISS into VP. o Add device model like DMAs, timers etc. o Model 4g/5g protocol stack blocks.
  • Design test frameworks. o Unit test frameworks. o Integration test frameworks. o Integrate code coverage, debugger and profiler tools. o Automation scripts to run and analyze the results. o Adapt test framework to work on HW, FPGA and virtual platforms.
  • Trace and Debug o Working with JTAGs, HW breakpoints, conditional breakpoints. o PC tracing using ETB. o Implement efficient on chip time stamped trace logs. o Implement performance monitor traces. o Implement SW for log packet transfer.
  • Work with silicon designers to define processor, bus, and memory subsystems.
  • Evaluate and implement leading edge tools for build, formal verification and test.
  • Define methodologies and best practices.

    Education & Experience

    Bachelors degree in Electrical Engineering or Computer Science is required.

  • Requirements

    See job description


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