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 Power Delivery Modeling Engineer - Cupertino, California, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Software Engineer
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200207879 / Latpro-3762503 
Date posted: Nov-18-2020
State, Zip: California, 95014


Power Delivery Modeling Engineer

Santa Clara Valley (Cupertino) , California , United States



Posted: Nov 17, 2020

Role Number: 200207879

Do you have a passion for crafting entirely new solutions? As part of our Silicon Engineering group, you will generate ideas and turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. You will be part of an exciting silicon design group that is responsible for crafting state-of-the-art ASICs. The SoC hardware development team is looking for a motivated applicant to work on the modeling of power dissipation, current demands and current profiles of SOC IPs, along with the corresponding voltage profiles and frequency of modern SOCs. The role involves engaging with the design team, working with the power modeling team, collaborating with the package and system design teams to model the current profiles for various IPs of the SOC, and the voltages required to achieve the target frequencies. The job also involves partnering with the lab and silicon characterization team on correlating the models to the HW data.

Key Qualifications

  • We are looking for applicants with 7+ years of demonstrated ability, proven programming skills and understanding of low-power digital design and power fundamentals, including:
  • Understanding of SOC power modeling and current profiles.
  • Understanding of electrical properties of on-die PDN, package and system power delivery.
  • Strong skills in scripting, programming and numerical methods.
  • Understanding of SOC IP and interfaces.
  • Understanding fundamentals of FET devices and CMOS technology.
  • Extensive background in EE.
  • Strong team playing and excellent communication skills are essential.


Imagine yourself collaborating with many fields, playing a decisive role of getting functional products to millions of customers quickly! You will have the opportunity to integrate and come-up with new insights, as well as work with a team of hardworking engineers and be involved in HW/model correlation efforts of mobile SoC design. Your main responsibilities will be: - Modeling of the current profiles for synthetic workloads and product use cases. - Modeling of the peak current demands of individual IPs. - Establishing voltages required to achieve the frequency goals on various IPs, including compute engines, media, caches and fabric. - Working with system and silicon package team to review and refine the voltage response of the power delivery network. - Interacting with the technology team to understand the silicon reliability requirements and establish required guard-bands. - Working with our lab and test teams to correlate models to HW data.

Education & Experience

MSEE or Ph.D. required.

Additional Requirements

  • Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.


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