Wireless PHY and Radio Design Verification Manager
Santa Clara Valley (Cupertino) , California , United States
Posted: Dec 11, 2020
Role Number: 200211226
At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product!
- 15+ years of relevant verification experience in SoC or PHY DFE and/or digital radio/transceiver, PLL Controller
- 10+ years of experience in SystemVerilog, C/C++, PHY DFE TX/RX algorithms, UVM, SVA. Knowledge of Formal Verification is an added advantage
- 10+ years of experience with Digital Mixed Signal verification (digital design + SystemVerilog real number models)
- 5+ years of managing a medium to large team of engineers through complex chips and dynamic schedules.
- Extraordinary leadership skills and ability to inspire team members with an innate ability to see the bigger picture.
- Passion to own/drive verification schedules using well-defined metrics.
- Experience working in a high-energy multi-disciplined engineering environment, strong at multi-tasking, and real-time crisis management
- Ability to understand and extract action plans from complex technical discussions and translate into succinct messaging for multi-functional and executive status reporting
- Excellent debugging skills. Proven ability to drive resolution of critical problems.
In this high profile role you will be responsible for the following. - Leading a team of verification engineers for the PHY DFE + radio unit of a Big Wireless Chip - Define the overall verification strategy from test planning to getting verification done, including digital and mixed signal verification. - Define the resourcing and bottom-up scheduling - Track progress very carefully and drive coordinate of verification activities across the design, DV, DMS, analog, emulation and SiVal teams - Present progress in a multi-functional and multi-disciplinary meeting
Education & Experience
MS / BS Degree in Computer / Electrical Engineering and 15+ years of relevant industry experience.