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 PHY RTL Design Engineer - Cupertino, California, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Other
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200229822 / Latpro-3778066 
Date posted: Mar-11-2021
State, Zip: California, 95014


PHY RTL Design Engineer

Santa Clara Valley (Cupertino) , California , United States



Posted: Mar 10, 2021

Role Number: 200229822

At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product.

Key Qualifications

  • At least 7 years of industry experience in wireless PHY design engineering.
  • Strong fixed-point knowledge and extensive experience with bit-true cycle-accurate verifications.
  • Understanding of Decoders - Viterbi, LDPC, Polar.
  • Understanding of Filter design, multi-radix implementation and compromises.
  • Knowledgeable in modern design techniques and energy-efficient/low power logic design and power analysis.
  • Familiarity with power estimation (vector-less and vector-based), modeling, profiling, and post silicon power correlation.
  • Solid understanding of wireless standards, such as IEEE 802.11, 802.15, Bluetooth or 3GPP is a plus.
  • Background in computer architecture.
  • Bus fabric, especially APB/AHB/AXI.
  • Power management with multiple power domainsPower management with multiple power domains.
  • Proven track record of bringing logic designs into high volume production
  • Ability to work well in a team and be productive under ambitious schedules.
  • Should exhibit excellent communication skills and be self-motivated and well organized.
  • Experience with FPGA and/or emulation platform desired.
  • Excellent communications skills - both written and oral.


We are looking for Physical Layer design engineers to design and implement sophisticated signal processing algorithms for Wireless LAN communication systems. Primary job responsibility is the architecture, design and verification of 802.11ac physical layer algorithms. In this role you will interact with protocol, software and systems teams to develop state-of-the-art wireless silicon for applications in Apple products. RESPONSIBILITIES Develop signal processing intensive design for wireless communication SoCs, including: - Writing specifications, other documents and defining Microarchitecture based on MATLAB/C system model. - Architecting area and power efficient low latency designs with scalability and flexibility. - Work with algorithm and software team to ensure performance and power efficiency. - Power and Area efficient RTL logic design, and DV support. - Running tools to ensure lint-free and CDC/RDC clean design. - Synthesis and timing constraints. - Experience in design of signal processing Wireless protocols including 802.11 a/b/g/n/ac.

Education & Experience

MSEE or Ph.D. preferred


See job description


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