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 Wireless SoC Silicon Power Engineer - Cupertino, California, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Other
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200230423 / Latpro-3778632 
Date posted: Mar-13-2021
State, Zip: California, 95014


Wireless SoC Silicon Power Engineer

Santa Clara Valley (Cupertino) , California , United States



Posted: Mar 13, 2021

Role Number: 200230423

At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product.

Key Qualifications

  • 5 or more years of experiences in SoC integration and Low Power ASIC design
  • Hands on experience with PTPX and Power Artist power analysis tools.
  • Proficiency in ASIC logic design
  • Extensive experience with SoC power management design including power gating, isolation, retention and DVFS techniques.
  • Deep understanding of ASIC low power design techniques, e.g. Power analysis, UPF, VCLP
  • SoC level clock mesh / reset design experience desirable
  • Proficiency in scripting languages (Shell and Perl highly desirable, Python skills are a plus)
  • SoC top-level integration experience is a plus
  • System architecture knowledge is a bonus
  • Silicon validation / power measurement experience is a plus.


- Drive low power micro-architecture, definition, implementation and analysis. - Maintain power roll-up and power spec at the chip level - Own complex SoC low power design, analysis, and implementation - Writing specifications and other documents - IP integration, RTL logic design, and DV support - Running tools to ensure lint-free and CDC clean design - Synthesis and timing constraints

Education & Experience



See job description


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