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 DRAM Failure Analysis Product Engineer - Cupertino, California, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Software Engineer
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200238635 / Latpro-3786045 
Date posted: Apr-16-2021
State, Zip: California, 95014


DRAM Failure Analysis Product Engineer

Santa Clara Valley (Cupertino) , California , United States



Posted: Apr 15, 2021

Role Number: 200238635

Does an exciting, dynamic, fast paced and team-oriented environment catch your attention? Do you love crafting sophisticated solutions to highly complex challenges? If so, consider joining us! We are seeking a DRAM Failure Analysis Product Engineer to work on Apple's next groundbreaking SoC's. As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and deftly handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, we will enable our customers to do all the things they love with their devices. In this position, you will be ensuring the successful integration of DRAM memories with SoC devices for Apple products.

Key Qualifications

  • Requires 3+ years in DRAM development.
  • Excellent communication and collaboration abilities.
  • Knowledge in DRAM cell architectures and memory organization and periphery design for low DRAM power.
  • Experience with memory interface verification with understanding DDR-PHY and Memory Controller.
  • Familiarity in memory test patterns.
  • Knowledge with state of the art packaging technology (pop, Tsv, etc.) and their relationship to DRAM signal/power integrity.
  • Previous experience in Failure Analysis of DRAM devices.
  • Excellent hardware and software debug skill.
  • Experience working with the major DRAM memory vendors.
  • Strong background in computer architecture Programming experience in C/C++.


  • Working with design, verification and integration engineers to ensure memory controller requirements are well defined and cover the scope of DRAM based corner cases.
  • Work with DRAM vendors for Apple's main memory solution.
  • Ensuring the timing, voltage and power of the DRAM silicon meets Apple's requirements.
  • Define DRAM corner silicon and ensure all AC/DC characteristics represent corner cases.
  • Drive the validation and qualification of DRAM with memory vendors.
  • Debugging RMA material with apparent DRAM related defects.
  • Collaborating with vendors to improve DRAM FAB/Assembly related defects.

    Education & Experience

    PhD or MS or BS Degree in technical subject area.

  • Requirements

    See job description


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