SoC Physical Design Engineer, Methodology PPA
Santa Clara Valley (Cupertino) , California , United States
Posted: Jun 1, 2021
Role Number: 200253115
At Apple we believe our products begin with our people. By hiring a diverse team, we drive creative thought. By giving that team everything they need, we drive innovation. By hiring incredible engineers, we drive precision. And through our collaborative process, we build memorable experiences for our customers. These elements come together to make Apple an amazing environment for motivated people to do the greatest work of their lives. You will become part of a hands-on development team that sets the standard in cultivating excellence, creativity and innovation. Come help us design the next generation of revolutionary Apple products. We're looking for a forward-thinking and unusually talented engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft and implement methodologies with a high impact on upcoming products that will delight and inspire millions of Apple's customers every single day. In this role, you'll be directly involved in our physical design methodology efforts, collaborating right alongside our internal multi-functional teams to ensure that our SOC's achieve the optimal Power, Performance, and Area (PPA). We account for every nano watt, every nano meter, and every pico second.
- You have a strong intellectual curiosity
- You have great problem solving skills and you pay a great attention to details
- With excellent communication skills, you're organized, and a self starter
- You have an interest in Physical Design, Circuit Design, or Device Physics
- You apply your scripting knowledge to solve engineering problems
As a Physical Design Methodology engineer you will be an active participant in the team responsible for ensuring our physical design methodology is efficient, lean, and reliable. You will create and implement methodologies that improve the Power, Performance, and Area (PPA) of our designs and improve the efficiency of our engineers and design flows. Part of it includes methodologies for logic synthesis, floor planning, power/clock distribution, place and route, timing/noise analysis, power/thermal analysis, voltage drop analysis, and design for manufacturing/yield. You will apply the latest advances in data science and machine learning if needed in crafting these methods. Generating, tracking, and monitoring PPA of designs is an example of the kind of work you will be doing. You will be responsible for generating automation and infrastructure to scale and improve the efficiency and reliability of the PPA regression in discerning aberrations and problems. You will do a deep dive to root cause and address any unexpected result. You will be working with CAD and design teams to drive these improvements and updates in our production design flows in an effective and timely manner. You will collaborate cross functionally with design, power, post silicon, and CAD teams as well as driving EDA vendors to deliver on our PPA goals.
Education & Experience
Bachelor's degree or higher in Electrical Engineering, Computer Science, or related field.