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 SoC Physical Design Methodology Engineer, Design Technology Optimization (DTCO) - Cupertino, California, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Programming Languages
Computers - Platforms
Computers - Networks
Computers - Software Engineer
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200287513 / Latpro-3823231 
Date posted: Sep-12-2021
State, Zip: California, 95014


SoC Physical Design Methodology Engineer, Design Technology Optimization (DTCO)

Santa Clara Valley (Cupertino) , California , United States



Posted: Sep 10, 2021

Role Number: 200287513

At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a visionary and uncommonly talented Physical Design Methodology Engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft and implement methodologies with a high impact on upcoming products that will delight and inspire millions of Apple's customers every single day. In this role, you will be at the center of a physical design methodology effort working with the physical design team, and collaborating with cross functional teams at Apple to improve our physical implementation flows and to ensure that the physical design optimizations translate into silicon measurable improvements in power and performance. This feedback entails influencing both physical design flows and technology based on silicon data.

Key Qualifications

  • Knowledge of industry standards and practices in Physical Design
  • Knowledge of extraction and STA methodology, flows, and tools
  • Knowledge of power delivery network noise analysis methodology, flows, and tools
  • Knowledge of circuit level simulation tools
  • Proven understanding of scripting languages such as Perl/Tcl
  • Experience with machine learning is a plus


As a Physical Design Methodology engineer you will be part of the team responsible for ensuring our physical design methodology is efficient, lean, reliable, and silicon accurate. You will work with our productization team on collecting silicon based metrics, and you will be responsible for creating efficient silicon data analysis flows using the latest advances in data science and machine learning. You will be responsible for creating physical design analysis flows that use the collected silicon data to close the design to silicon gap. You will be responsible for developing silicon focused physical design methodologies that translate into actual performance and power improvements in silicon. You will work with our physical design and CAD teams to deploy these silicon focused methodologies on our products using efficient and reliable flows. You will use your gained silicon based insights to provide feedback to our technology and library teams.

Education & Experience

Minimum Bachelor's Degree in EECS or equivalent


See job description


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