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 Senior Validation Engineer - Boston, Massachusetts, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Programming Languages
Computers - Platforms
Computers - Networks
Computers - Software Engineer
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200292945 / Latpro-3827409 
Date posted: Sep-28-2021
State, Zip: Massachusetts, 02117


Senior Validation Engineer

Boston , Massachusetts , United States



Posted: Sep 27, 2021

Role Number: 200292945

At Apple, we work every single day to craft products that enrich people's lives. Do you love leading teams on challenges that no one has solved yet? Do you enjoy working with cross-functional teams to deliver IP solutions for products that impacts customers' lives? We have an opportunity for a visionary and especially talented senior validation and characterization lead to post silicon IP validation efforts. As the lead in an IP validation team, you will have the rare and rewarding opportunity to validate innovative AMS IP in Apple's products that will delight and inspire millions of customers. Besides guiding this team, you will also play a very hands-on role in debug, stressing, and data analysis on the performance of AMS IP for Apple's world-class SOCs.

Key Qualifications

  • The ideal candidate should have experience with and expertise in the following:
  • o Interop testing, debug, and characterization
  • o Familiar with industry standards for interfaces at the electrical and protocol levels
  • o Probing techniques and signal integrity of high-speed transmission lines
  • o Excellent programming skills, Python preferred, tcl and C/C++
  • o Expertise with electronic measurement, protocol analyzers/exerciser equipment
  • o High speed electronic measurements, time and frequency domain instruments
  • Experience in the following areas is desirable:
  • o 10+ years of experience in characterization of complex high-speed IP such as
  • o SERDES
  • o PLL
  • o DDR memory interfaces
  • o Data converters
  • o Precision sensors


In this role, the key responsibilities include but not limited to leading post silicon characterization and validation efforts of AMS IPs. Characterize, analyze and debug analog IP for SOCs, work closely with logic and circuit design, SoC, product, and test engineering. Develop deep understanding of details of the IP architecture/design. Develop understanding of the application of the IP in an SoC/System. Collaborate with design team to improve test/debug architecture. Define and develop methods for stress testing to identify IP failure limits. Plan and execute electrical, stress and interoperability characterization of analog IP. Lead bring-up, debug, characterization and mass production ramp. Drive development of measurement tools and automation of high-performance IP.

Education & Experience

BSEE, BS-ECE is required MSEE, MS-ECE is a plus


See job description


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