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 Test Chip Engineering Program Manager - Austin, Texas, United States

Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Programming Languages
Computers - Platforms
Computers - Networks
Computers - Software Engineer
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200291887 / Latpro-3831736 
Date posted: Oct-13-2021
State, Zip: Texas, 78729


Test Chip Engineering Program Manager

Austin , Texas , United States



Posted: Oct 8, 2021

Role Number: 200291887

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! The Test Chip Engineering Program Manager within the Hardware Technologies Engineering organization, you will be responsible to drive end-to-end silicon schedules and resolving technical issues to enable timely Test Chip silicon for custom Analog and Digital Hard IP development and validation. This is an individual contributor role, helping handle the development process for test chips that support Hard IPs used in our next-generation Apple products. The focus of this role is on the specification and design of Test Chips and post-silicon validation of the IPs before the target SOC tapeout. Strong technical background in Digital and/or Analog IP development will allow you to succeed in this role.

Key Qualifications

  • Requires 5+ years proven ability in SoC/VLSI Chip Design, ASIC Chip Design, Technology process development, or Analog/Digital IP design.
  • 1+ years in Technical Program or Project Management, or Functional Management experience.
  • Good knowledge of the Analog/Digital IP development process, tools/flows and methodologies, and the life-cycle in a Test Chip.
  • Phenomenal leadership and communication skills across all levels of the organization, including Executive communication.
  • Experience working in a multifaceted engineering environment, strong at multi-tasking and real-time crisis management.
  • Expertise owning and driving project development using well-defined metrics.
  • Programming language experience (Javascript, Python, Perl).
  • Familiarity with project management tools (Confluence, JIRA).


  • Work on a Program Management team responsible for driving technical issue resolution to deliver timely silicon to meet daring Test Chip schedules.
  • Drive internal program processes to guarantee high-quality silicon definition and design execution.
  • Support high-level milestone execution in a fast-paced design team.
  • Interface and drive issues within multi-functional teams: Design, Verification, DFT, Validation, Technology, Digital IP, Analog IP.
  • Focus design teams on meeting near-term achievements and unblocking technical issues by pulling together the right technical specialists to resolve the issues with data-driven decision-making.
  • Manage dependencies across various programs, functional teams, and sites.
  • Focused issue reporting, bug tracking, and communication of program risks and status.
  • Identify risks, develop mitigation strategies, and facilitate conflict resolution.

    Education & Experience

    MSEE/BSEE Degree or equivalent

  • Requirements

    See job description


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