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 Formal Verification Engineer - Austin, Texas, United States

   
Job information
Posted by: Apple 
Hiring entity type: Retail 
Work authorization: Not Specified for United States
Position type: Direct Hire, Full-Time 
Compensation: ******
Benefits: See below
Relocation: Not specified 
Position functions: Computers - Programming Languages
Computers - Platforms
Computers - Networks
Computers - Software Engineer
 
Travel: Unspecified 
Accept candidates: from anywhere 
Languages: English - Fluent
 
Minimum education: See below 
Minimum years experience: See below 
Resumes accepted in: English
Cover letter: No cover letter requested
Job code: 200310658 / Latpro-3839212 
Date posted: Nov-07-2021
State, Zip: Texas, 78729

Description

Formal Verification Engineer

Austin , Texas , United States

Hardware

Summary

Posted: Nov 6, 2021

Role Number: 200310658

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices. Learn from the best Formal Verification team in the world and acquire experience being at the center of a System-on-a-chip (SoC) design verification effort collaborating with design. Are you passionate about changing the world? We have a critical impact on getting high quality functional products to millions of customers quickly, and we are hiring all levels from junior to senior roles.

Key Qualifications

  • Interest in learning and becoming an expert in SoC/CPU/GPU/Cellular designs, VLSI, and digital logic design and verification techniques
  • Detail oriented mindset and desire to overcome challenges is required

Description

As a formal verification engineer working the complete formal verification for single or multiple design blocks and IP's (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.), you will be responsible for: Working with Apple Silicon's world-class SOC and IP design engineers to develop a formal micro-architecture specification. Developing comprehensive formal verification test plan. Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture. Crafting novel and creative solutions for verifying complex design micro-architectures. Developing and implementing re-usable and optimized formal models and verification code base. Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity.

Education & Experience

BS / MS / Ph.D in EE or CS is required.

Additional Requirements

  • - Formal Method or Formal Verification technologies experience and abstraction techniques
  • - Knowledge and experience in interpreting hardware specifications and using
  • - Temporal logic assertion-based languages such as SVA or PSL
  • - Experience in using EDA formal tools and tool development experience is a plus
  • - Proficiency in any scripting language with excellent debugging skills
  • - Extraordinary teammate with excellent interpersonal skills
  • - Passionate about developing world-class/innovative formal verification solutions





Requirements

See job description

 

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