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Digital Design Engineer - PMIC

Marvell Semiconductor, Inc.
paid time off, flex time, 401(k)
United States, Arizona, Chandler
1750 East Northrop Boulevard (Show on map)
May 19, 2024

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As a Digital IC Design Staff Engineer with Marvell, you'll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing Power Management Solutions to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You'll be part of a digital team making a big impact on this organization.

This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.

What You Can Expect

Your role involves conducting in-depth circuit analysis for compact sub-circuit blocks within our overall design, considering Process, Voltage, and Temperature (PVT) factors. Using your experience using transistor-level circuit design software like Cadence Virtuoso or Spectre X for design analysis, you will be mentoring others to optimize performance within specified area and power constraints, utilizing engineering judgment to balance trade-offs and refine designs. Your day-to-day activities include iterative testing, documentation, summarization of findings, and collaboration with the global team through regular meetings, ensuring alignment within the 18-month project cycles. Tools such as Python, Perl, and the Microsoft Office Suite will be integral to your tasks, and proficiency in a Linux environment is essential for seamless execution.

What We're Looking For

To be successful in this role, you must:
- Have a Bachelor's or Master's in Electrical Engineering, Computer Engineering, Computer Science, or similar field. Degrees in mathematics, physics or other sciences may be considered provided adequate coursework in electronics was taken also or work experience has provided relevant knowledge since graduation.
- Independently analyzes and optimizes small sub-circuit blocks within our overall design across Process, Voltage, Temperature
* Responsible engineer for at least one major sub-circuit block from architecture definition to fine tuning the implementation by using Verilog or systemVerilog RTL.
* Identifies and proposes innovative solutions to enhance the design of at least one major sub-circuit block.

* Creates block level test benches and simple behavioral models to verify the design.
* Participates in root cause investigation and silicon validation of model to hardware correlation issues.
* Mentors and coaches new and/or less experienced team members as the team grows.

#LI-TD1

Expected Base Pay Range (USD)

104,000 - 153,850, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

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